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APL5315
Selectable Adjustable/Fixed Low dropout 300mA Linear Regulator Features * * * * * * * * * *
Wide Operating Voltage: 2.7~6V Low Dropout Voltage: 230mV(typical) @ 300mA Guaranteed 300mA Output Current Two Modes for Setting Output Voltage - Fixed Output Voltage: 1~5V - Adjustable Output Voltage: 0.8~5.5V Current Limit Protection with Foldback Current Internal Soft-Start Over Temperature Protection Stable with Low ESR Ceriamic Capacitor SOT-23-5 Package Lead Free Available (RoHS Compliant)
General Description
The APL5315 is a P-channel low dropout linear regulator which needs only one input voltage from 2.7~6V, and delivers current up to 300mA to set output voltage. It also can work with low ESR ceramic capacitors and is ideal for using in the battery-powered applications such as notebook computers, cellular phones. Typical dropout voltage is only 230mV at 300mA loading. The APL5315 provides two kinds of output voltage operation modes for setting the output voltage. Fixed output voltage mode senses the output voltage on VOUT, adjustable output voltage mode needs two resistors as a voltage divider. Current limit with current foldback and thermal shutdown functions protect the device against current over-loads and over temperature. The APL5315 is available in a SOT-23-5 package.
Simplified Application Circuit
VIN APL5315 3 CIN 1 VIN SHDN 2 VOUT SET 4 5 COUT VOUT
Applications * * *
Cellular Phones Portable and Battery-powered Equipment Notebook and Personal Computers
GND
Ordering and Marking Information
APL5315 Lead Free Code Handling Code Temperature Range Package Code Voltage Code Package Code B : SOT- 23-5 Operating Junction Temperature Range I : -40 to 85C Handling Code TR : Tape & Reel Voltage Code 12 : 1.2V Blank: Adjustable Lead Free Code L : Lead Free Device
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldering operations. ANPEC lead-free products meet or exceed the leadfree requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature.
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright (c) ANPEC Electronics Corp. Rev. A.2 - Mar., 2007 1 www.anpec.com.tw
APL5315
Product Name APL5315 APL5315-18 Marking 35RX 35CX Product Name APL5315-12 APL5315-25 Marking 355X 35JX Product Name APL5315-15 APL5315- 33 Marking 359X 35RX (Note2)
Note1 : Other voltage version please contact ANPEC for detail. Note2 : Because APL5315 and APL5315-33 are identical, the marking of APL5315 is same as APL5315-33.
Pin Configuration
SHDN 1 GND 2 VIN 3 SOT-23-5 5 SET 4 VOUT
Absolute Maximum Ratings
Symbol VIN VSHND PD TJ TSTG TSDR Parameter VIN Supply Voltage (VIN to GND) SHND Input Voltage (SHND to GND) Power Dissipation Junction Temperature Storage Temperature Soldering Temperature, 10 Seconds Rating -0.3 ~ 6.5 -0.3 ~ 6.5 Internally Limited -40 ~ 150 -65 ~ 150 260 Unit V V W X C X C X C
Thermal Characteristics
Symbol JA Parameter Thermal Resistance-Junction to Ambient (Note 3) Typical Value 240 Unit
o
C/W
Note3 : JA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions
Symbol VIN VOUT IOUT COUT TJ VIN Supply Voltage Output Voltage VOUT Output Current Output Capacitor Junction Temperature Parameter Range 2.7 ~ 6 0.8 ~ 5.5 0 ~ 300 1.5 ~ 33 -40 ~ 125 Unit V V mA F
o
C
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APL5315
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN = VOUT+1V (min VIN=2.7V), IOUT=0~300mA, CIN = 1F, COUT = 2.2F, TA = -40 to 85oC. Typical values are at TA = 25oC.
Symbol VIN VOUT
Parameter Input Voltage Output Voltage Range UVLO Threshold UVLO Hysteresis
Test Condition Min. 2.7 0.8 1.5 --IOUT =10mA ~300mA Measured on SET, VIN=2.7V, IOUT=10mA Fixed output voltage, IOUT=10mA G OUT%/G IN, IOUT=10mA V V G OUT%/GOUT V I VOUT = 2.5V, IOUT = 300mA --0.784 -2 -0.06 -0.2 --------400 VOUT = 0V --1.6 --SHDN = Low, VIN = 6V ----SHDN = Low ---------
APL5315 Typ. ----2.3 0.8 120 0.8 ------230 170 45 160 500 80 ----0.1 3 60 160 40 100 Max. 6 5.5 2.6 --160 0.816 +2 +0.06 +0.2 360
Unit V V V V A V % %/V %/A
IQ VREF
Quiescent Current Reference Voltage Output Voltage Accuracy
REGLINE Line Regulation REGLOAD Load Regulation
VDROP
Dropout Voltage VOUT = 3.3V, IOUT = 300mA 300 ----650 ----Power Supply Ripple Rejection Ratio Noise
mV
PSRR
f = 10kHz, IOUT = 300mA f = 80Hz to 100KHz, IOUT = 300mA
dB VRMS mA mA V
ILIMIT ISHORT
Current Limit Foldback Current SHDN Input Voltage High SHDN Input Voltage Low Shutdown VIN Supply Current SHDN Pull Low Resistance VOUT Discharge MOSFET RDS(ON) Over Temperature Threshold Over Temperature Hysteresis SET Input Threshold for Fixed/Adjustable Output Voltage Mode SET input bias current VSET=0.8V
0.4 1 ----------A M X C X C
mV
-100 60
--80
100 100
nA s
TSS
Soft-Start Interval
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APL5315
Typical Operating Characteristics
Quiescent Current vs. Supply Voltage
160 140 Quiescent Current, IQ (A) 120 100 80 60 40 20 0 0 1 2 3 4 5 6 7 Supply Voltage, VIN (V) IOUT= 0mV
Quiescent Current vs. Junction Temperature
114 112 Quiescent Current, IQ (A) 110 108 106 104 102 -50 -25 0 25 50 75 100 125
Junction Temperature, T J (X C)
Quiescent Current vs. Output Current
180 160 Quiescent Current, IQ (A) 140 VIN=5.5V
PSRR (dB) 0 -10 -20
PSRR vs. Frequency
VIN=3.3V, VOUT=1.2V CIN=1F, COUT=2.2F IOUT=300mA
120 100 80 60 0 50 100
-30 -40 -50 -60
VIN=4.5V
150
200
250
300
1000
10000
100000
1000000
Output Current, I OUT (mA)
Frequency (Hz)
Dropout Voltage vs. Output Current
300 VOUT=2.5V Dropout Voltage, VDROP (mV) 250 200 150 TJ=25X C TJ=75X C TJ=125X C
Dropout Voltage vs. Output Current
250 VOUT=3.3V Dropout Voltage, VDROP (mV) 200 TJ=125X C TJ=25X C TJ=75X C
150
100 TJ=0X C TJ=-50X C
100 TJ=-50X C 50
TJ=0X C
50
0 0 100 200 Output Current, I OUT (mA) 300
0 0 100 200 Output Current, IOUT (mA) 300
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APL5315
Typical Operating Characteristics (Cont.)
Loop Gain vs. Frequency
50 40 30 20 Loop Gain (dB) 10 0 -10 -20 -30 -40 1000 10000 100000 1000000 Frequency (Hz) IOUT=300mA
40 20 0 1000 10000 100000 Frequency (Hz) 1000000 IOUT=100mA 160
Phase vs. Frequency
140 120 Phase (degree) 100 80 60 VIN=3.3V, VOUT=1.2V, CIN=1F, C OUT=2.2F IOUT=300mA
VIN=3.3V, VOUT=1.2V, CIN=1F, COUT=2.2F IOUT=100mA
Current Limit vs. Junction Temperature
600 VIN=5V
Current Limit, ILIMIT (mA)
550
500
450
400 -50 -25 0 25 50 75 Junction Temperature, T J (X C) 100 125
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APL5315
Operating Waveforms
Load Transient
VIN=3.3V, CIN=1F, COUT=2.2F, TR=1s
Line Transient
CIN=1F, COUT=2.2F, TR=10s, IOUT=10mA
V OUT
V IN
V OUT
IOUT
CH1 : VOUT, 50mV/div, AC CH2 : IOUT, 100mA/div, DC Time : 100s/div
CH1 : VIN, 1V/div, DC CH2 : VOUT, 20mV/div, AC Time : 100s/div
Enable
Shutdown
V OUT
V OUT
V SHDN
V SHDN
I OUT
I OUT
CH1 : VOUT, 500mV/div CH2 : VSHDN, 5V/div CH3 : IOUT, 200mA/div Time : 50s/div
CH1 : VOUT, 500mV/Div CH2 : V , 5V/Div SHDN CH3 : IOUT, 200mA/Div DC Time : 10s/Div
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APL5315
Operating Waveforms (Cont.)
Power on
Power off
V IN
V IN
V OUT
V OUT
I OUT
I OUT
CH1 : VIN, 2V/div CH2 : VOUT, 500mV/div CH3 : IOUT, 100mA/div Time : 200s/Div
CH1 : VIN, 2V/div CH2 : VOUT,, 500mV/div, CH3 : IOUT, 100mA/div Time : 50ms/Div
Pin Descriptions
PIN No NAME I/O FUNCTION
1 2 3 4 5
SHDN GND VIN VOUT SET
I I O I
Shutdown control pin, logic high: enable; logic low: shutdown Ground pin Voltage supply input pin Regulator output pin Connect this pin to ground for fixed output voltage operation. Connect this pin to an external resistor divider for adjustable output voltage mode operation.
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APL5315
Block Diagram
SHDN
UVLO & Shutdown Logic Thermal Shutdown + Foldback current limit
VIN
VOUT 3M[ Low SET High + GND V REF 100mV
Typical Application Circuits
1. Fixed Output Voltage Mode
VIN
APL5315 3 1 VIN SHDN GND 2 VOUT SET 4 5
VOUT
CIN 1F
COUT 2.2F
Enable
Shutdown
2.2F/GRM155R60J225M Murata
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APL5315
Typical Application Circuits (Cont.)
2. Adjustable Output Voltage Mode
APL5315 3 1 VIN SHDN GND 2 Enable R2 VOUT SET 4 5 R1
VIN
VOUT
CIN 1F
COUT 2.2F
Shutdown
R1 VOUT = 0.8 1 + R2
Functional Descriptions
Internal Soft-Start An internal soft-start function controls rising rate of the output voltage to limit the surge current at start-up. The typical soft-start interval is about 80s. Output Voltage Regulation The APL5315 can works in either fixed or adjustable mode by connecting the SET to GND or a resistor-divider which receives the feedback voltage of the regulator. The output voltage set by the resistor-divider is determined by:
R1 VOUT = 0.8 1 + R2
ture of APL5315. When the junction temperature exceeds +160C, a thermal sensor turns off the output PMOS, allowing the device to cool down. The regulator regulates the output again through initiation of a new softstart cycle after the junction temperature cools by 40C. The thermal shutdown designed with a 40C hysteresis lowers the average junction temperature during continuous thermal overload conditions, extending life time of the device. For normal operation, device power dissipation should be externally limited so that junction temperature will not exceed 125C. Under-Voltage Lock Out (UVLO) The APL5315 monitors the input voltage to prevent wrong logic control. The UVLO function initiates a softstart process after input voltage exceeds its rising UVLO threshold during power on. The UVLO function also shuts off the output when the input voltage falls below it' falling threshold. Typical UVLO hysteresis s voltage is 0.8V. Shutdown Control The APL5315 has an active-low shutdown function. Force SHDN high (>1.6V) enables the VOUT; force SHDN low (<0.4V) disables the VOUT. SHDN is internally pulled low by a resistor (3M typical). If it is not used, connect to VIN for normal operation.
Where R1 is connected from VOUT to SET with Kelvin sensing and R2 is connected from SET to GND. The recommended value of R2 is in the range of 100~100K. An error amplifier working with a temperature compensated 0.8V reference and an output PMOS regulates the output to the presetting voltage. The error amplifier designed with high bandwidth and DC gain provides very fast transient response and less load regulation. It compares the reference with the feedback voltage and amplifies the difference to drive the output PMOS which provides load current from VIN to VOUT. Thermal Shutdown A thermal shutdown circuit limits the junction tempera-
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APL5315
Application Information
Input Capacitor The APL5315 requires proper input capacitors to supply surge current during stepping load transients to prevent the input rail from dropping . Because the parasitic inductor from the voltage sources or other bulk capacitors to the VIN limit the slew rate of the surge current. Place the Input capacitors near VIN as close as possible. Input capacitors should be larger than 1F and a minimum ceramic capacitor of 1F is necessary. Operation Region and Power dissipation The APL5315 maximum power dissipation depends on the thermal resistance and temperature difference between the die junction and ambient air. The power dissipation PD across the device is: PD = (TJ - TA) / cJA where (TJ-TA) is the temperature difference between the junction and ambient air. c JA is the thermal resistance between Junction and ambient air. Assuming the TA=25 oC and maximum TJ=160 oC (typical thermal limit threshold), the maximum power dissipation is calculated as: PD(max)=(160-25)/240 = 0.56(W) For normal operation, do not exceed the maximum junction temperature rating of TJ = 125 oC. The calculated power dissipation should less than: PD =(125-25)/240 = 0.41(W) The GND provides an electrical connection to ground and channels heat away. Connect the GND to ground by using a large pad or ground plane. Layout Considerations Figure 2 illustrates the layout. Below is a checklist for yours layout: 1. Please place the input capacitors close to the VIN. 2. Ceramic capacitors for load must be placed near the load as close as possible. 3. To place APL5315 and output capacitors near the load is good for performance. 4. Large current paths, the bold lines in figure 2, must have wide tracks. 5. Divider resistor R1 and R2 must be placed near the SET as close as possible.
0 1 2 3 4 5 6
Output Capacitor The APL5315 needs a proper output capacitor to maintain circuit stability and to improve transient response over temperature and current. In order to insure the circuit stability, the proper output capacitor value should be larger than 2.2F. With X5R and X7R dielectrics, 2.2F is sufficient at all operating temperatures. Large output capacitor value can reduce noise and improve load-transient response and PSRR, however it also affects power on issue. Equation (1) shows the relationship between the maximum COUT value and VOUT. 0.1155 ..................(1) COUT(max) = 87 0.55 VOUT Where the unit of COUT is F and VOUT is V. Figure 1 shows the curve of maximum output capacitor over the output voltage. The output voltage range is from 0.8 to 5.5V and the output capacitor value should be under the line. Output capacitors must be placed at the load and ground pin as close as possible and the impedance of the layout must be minimized.
Output Capacitor (uF)
48 45 42 39 36 33 30
Output voltage (V) Figure 1
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APL5315
Application Information (Cont.)
PCB Layout Consideration( Cont.)
CIN APL5315 VIN VOUT SET GND 2 R2 LOAD 3 4 5 R1 VOUT VIN
COUT
Figure 2
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APL5315
Package Information
SOT23-5
D e
SEE VIEW A E1 b e1 E
c
0.25 GAUGE PLANE SEATING PLANE VIEW A
0
A2 A1
A
L
S Y M B O L A A1 A2 b c D E E1 e e1 L 0
SOT23-5 MILLIMETERS MIN. MAX. 1.45 0.00 0.90 0.30 0.08 2.90 BSC 2.80 BSC 1.60 BSC 0.95 BSC 1.90 BSC 0.30 0 0.60 8 0.012 0 0.15 1.30 0.50 0.22 0.000 0.035 0.012 0.003 0.114 BSC 0.110 BSC 0.063 BSC 0.037 BSC 0.075 BSC 0.024 8 MIN. INCHES MAX. 0.057 0.006 0.051 0.020 0.009
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APL5315
Carrier Tape & Reel Dimensions
t P P1 D
Po E
F W
Bo
Ao
Ko D1
T2
J C A B
T1
Application SOT-23-5
A 178 1 F 3.5 0.05
B D 1.5 0.1
C D1 1.5 0.1
J Po 4.0 0.1
T1 8.4 2 P1
T2 1.5 0.3 Ao
W 8.0 0.3 Bo 3.2 0.1
P 4 0.1 Ko
E 1.75 0.1
72 1.0 13.0 + 0.2 2.5 0.15
2.0 0.1 3.15 0.1
t (mm) 1.4 0.1 0.20.033
Cover Tape Dimensions
Application SOT23-5 Carrier Width 8 Cover Tape Width 5.3 Devices Per Reel 3000
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APL5315
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material: 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
TP
(IR/Convection or VPR Reflow)
tp Critical Zone TL to TP Ramp-up
TL
Temperature
tL Tsmax
Tsmin Ramp-down ts Preheat
25
t 25C to Peak
Time
Classification Reflow Profiles
Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5C of actual Peak Temperature (tp) Ramp-down Rate Time 25C to Peak Temperature Sn-Pb Eutectic Assembly 3C/second max. 100C 150C 60-120 seconds 183C 60-150 seconds See table 1 10-30 seconds 6C/second max. 6 minutes max. Pb-Free Assembly 3C/second max. 150C 200C 60-180 seconds 217C 60-150 seconds See table 2 20-40 seconds 6C/second max. 8 minutes max.
Notes: All temperatures refer to topside of the package. Measured on the body surface.
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APL5315
Classification Reflow Profiles (Cont.)
Table 1. SnPb Entectic Process - Package Peak Reflow Temperatures Package Thickness <2.5 mm 2.5 mm Volume mm <350 240 +0/-5C 225 +0/-5C
3
Volume mm 350 225 +0/-5C 225 +0/-5C
3
Table 2. Pb-free Process - Package Classification Reflow Temperatures Volume mm Volume mm Volume mm <350 350-2000 >2000 <1.6 mm 260 +0C* 260 +0C* 260 +0C* 1.6 mm - 2.5 mm 260 +0C* 250 +0C* 245 +0C* 2.5 mm 250 +0C* 245 +0C* 245 +0C* * Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0C. For example 260C+0C) at the rated MSL level. Package Thickness
3 3 3
Reliability Test Program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245C, 5 SEC 1000 Hrs Bias @125C 168 Hrs, 100%RH, 121C -65C~150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA
Customer Service
Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pao Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
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